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Silicon Labs /SiM3_NRND /SIM3U167_B /SARADC_1 /FIFOSTATUS

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Interpret as FIFOSTATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FIFOLVL0 (LOWER)DPSTS 0 (NOT_SET)DRDYF

DRDYF=NOT_SET, DPSTS=LOWER

Description

FIFO Status

Fields

FIFOLVL

FIFO Level.
DPSTS

Data Packing Status.

0 (LOWER): The next ADC conversion will be written to the lower half-word.

1 (UPPER): The next ADC conversion will be written to the upper half-word.
DRDYF

Data Ready Flag.

0 (NOT_SET): New data is not produced yet.

1 (SET): New data is ready.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data